Journal of Electrical and Computer Engineering

Volume 2017 (2017), Article ID 4805268, 10 pages

https://doi.org/10.1155/2017/4805268

## A Comparative Study of Symmetrical Cockcroft-Walton Voltage Multipliers

Laser & Optics Research School, NSTRI, Tehran 14399-51113, Iran

Correspondence should be addressed to Mohsen Ruzbehani

Received 18 July 2016; Accepted 18 December 2016; Published 16 January 2017

Academic Editor: George S. Tombras

Copyright © 2017 Mohsen Ruzbehani. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

#### Abstract

Decades after invention of the Cockcroft-Walton voltage multiplier, it is still being used in broad range of high voltage and ac to dc applications. High voltage ratio, low voltage stress on components, compactness, and high efficiency are its main features. Due to the problems of original circuit, reduction of output ripple and increase of accessible voltage level were the motivations for scientist to propose new topologies. In this article a comparative study on these voltage multipliers was presented. By simulations and experimental prototypes, characteristics of the topologies have been compared. In addition to the performances, components count, voltage stress on the components, and the difficulty and cost of construction are other factors which have been considered in this comparison. An easy to use table which summarized the characteristics of VMs was developed, which can be used as a decision mean for selecting of a topology based on the requirements. It is shown that, due to the application, sometimes a simple and not very famous topology is more effective than a famous one.

#### 1. Introduction

High voltage dc power supplies are widely used for many applications, such as particle accelerators, X-ray systems, electron microscopes, photon multipliers, electrostatic systems, lasers systems, and electrostatic coating [1–5]. There are several approaches in producing high voltage dc sources depending on the desired voltage and current levels. A more usual choice when a power supply with high voltage and low current is needed is the Cockcroft-Walton voltage multiplier (CWVM). High voltage ratio, low voltage stress on the diodes and capacitors, compactness, and high efficiency are the main reasons for this choice [3, 5, 6]. Furthermore it can be used in medium voltage applications when the current is low and simple circuit is the matter, like portable pulsed power applications and handheld devices [7–9]. The CWVM has the unique characteristic of imposing equal voltage stresses on every stage. Its construction is also simple and easy to implement [10]. Usually, in modern types of voltage multipliers there are three stages; a high frequency inverter which produces fast dynamic voltage source with controllable duty cycle to control the current and voltage level, a transformer, and a CW voltage multiplier [11]. In this article only the topologies of VMs, regardless of inverter construction, are studied.

Historically the original idea was proposed by Greinacher in 1921. However, it did not get attention for a long time until Cockcroft and Walton performed their experiment using this circuit in 1932 [12]. Large output voltage ripple and output voltage drop were the main problems of the original half-wave voltage multiplier. Consequently, to overcome these problems, a symmetrical voltage multiplier (SVM) was developed by Heilpern in 1954 by adding an extra oscillating column of capacitors and a stack of rectifiers [1, 13] Because voltage ripple in a half-wave rectifier due to the charge and discharge of capacitors has almost a triangular-like shape, by using two voltage sources with 180° phase difference, the overall voltage ripple magnitude can be reduced greatly. If the ripple was an isosceles triangle shaped waveform, the opposite phase could exactly cancel out the voltage peaks so that the voltage ripple would be disappeared in the output voltage. However, this is not the case, so the ripple will not be removed completely, and the result is only reduction of ripple amplitude. This is the main feature of a symmetrical voltage multiplier. Based on this idea, recently a three-phase symmetrical voltage multiplier with six oscillating columns and one smoothening column has been proposed [2, 14]. Furthermore, there are other topologies which based on this idea have lower voltage ripple compared to the conventional one, which will be studied in this article. Other types of voltage multipliers based on CWVM have been developed recently which a CWVM is fed by a matrix converter [6]. The matrix converter generates an adjustable frequency and adjustable-amplitude current, which is injected into the CWVM to regulate the dc output voltage and smooth its ripple. However, in this article, the CWVM is the subject, regardless of how it may be fed.

The comparison of these VMs is important because selecting a topology for an application due to many factors involved is not a straightforward task. The range of output voltage level, necessary safety factors, ground-returned or bipolar output, and speed of response and so on are the main factors which should be considered in such selection. To the best of author’s knowledge, until now such comparison has not been made.

This paper is organized as follows. The mathematical model of the CWVM is reviewed in Section 2. Symmetrical voltage multipliers are introduced in Section 3. Comparisons between the symmetrical VMs by simulation are presented in Section 4. In Section 5 experimental low voltage prototypes are constructed to justify the results of simulations. Finally conclusion is given in Section 6.

#### 2. Basic Voltage Multiplier

Figure 1 shows a basic 4-stage Cockcroft-Walton voltage multiplier circuit. It consists of two capacitor columns, namely, oscillating and smoothening columns. Oscillating column capacitors , , , and are charged in half cycle by upward odd numbered diodes (, , , and , respectively) and in next half cycle the smoothening column capacitors (, , , and ) are charged by downward even numbered didoes (, , , and ). In steady state, in no-load condition, every capacitor in smoothening column is charged to , that is, two times of maximum input voltage magnitude. Therefore, the maximum value of output voltage is in which is the number of multiplier stages (here ).