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Journal of Electrical and Computer Engineering
Volume 2017 (2017), Article ID 9361493, 12 pages
https://doi.org/10.1155/2017/9361493
Research Article

A Design Space Exploration Framework for ANN-Based Fault Detection in Hardware Systems

University of Cyprus, Nicosia, Cyprus

Correspondence should be addressed to Andreas G. Savva

Received 28 July 2017; Accepted 29 October 2017; Published 3 December 2017

Academic Editor: Ping Feng Pai

Copyright © 2017 Andreas G. Savva et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Abstract

This work presents a design exploration framework for developing a high level Artificial Neural Network (ANN) for fault detection in hardware systems. ANNs can be used for fault detection purposes since they have excellent characteristics such as generalization capability, robustness, and fault tolerance. Designing an ANN in order to be used for fault detection purposes includes different parameters. Through this work, those parameters are presented and analyzed based on simulations. Moreover, after the development of the ANN, in order to evaluate it, a case study scenario based on Networks on Chip is used for detection of interrouter link faults. Simulation results with various synthetic traffic models show that the proposed work can detect up to 96–99% of interrouter link faults with a delay less than 60 cycles. Added to this, the size of the ANN is kept relatively small and they can be implemented in hardware easily. Synthesis results indicate an estimated amount of 0.0523 mW power consumption per neuron for the implemented ANN when computing a complete cycle.