Research Article
An Efficient Design of QCA Full-Adder-Subtractor with Low Power Dissipation
Figure 9
The calculated average output polarization (AOP) of the proposed designs against temperature T in Kelvin. (a) Three-input XOR gate, (b) subtractor for outputs ‘‘B_out” and ‘‘Diff,” and (c) adder for outputs ‘‘Sum” and ‘‘C_out.”
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(b) |
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