An Efficient Design of QCA Full-Adder-Subtractor with Low Power Dissipation

Table 3

Three-input QCA XOR gates comparison.

Three-input XOR	Area (μm^2)	Cell count	Latency
Ref [22]	0.012	12	1
Ref [24]	0.017	22	1
Ref [20]	0.073	94	1.5
Ref [21]	0.022	14	0.5
Ref [23]	0.011	14	0.5
Proposed design	0.006	8	0.5