A Block-Based and Highly Parallel CNN Accelerator for Seed Sorting

Table 8

Comparison with previous FPGA-based design.

Design	Device	DSPs	BRAM	Frequency (MHZ)	FPS	FPS/DSP
[48]	Intel® Arria® 10 (AS066N3F40E2SG)	1278	36.9	133	266	0.208
[61]	Xilinx ZYNQ Ultrascale + (XCZU9EG)	1437	30.9	200	11	0.008
[63]	Xilinx ZYNQ 7000 (XC7Z020)	220	3.2	100	3.07	0.013
Ours	Xilinx ZYNQ 7000 (XC7Z020)	206	4.9	150	17	0.083