III–V Nanowires: Synthesis, Property Manipulations, and Device Applications
Figure 8
Au cluster decoration on InAs NWFETs. (a) Typical SEM image and schematic configuration of an Au decorated InAs NWFET. (b) curves of the InAs NWFET before and after the decoration (decoration: Au cluster with an equivalent film thickness of 1.0 nm covered with a 20 nm thick evaporated Al2O3 layer; V). (c) curves of the InAs NWFET before and after Al2O3 deposition (control; V). (d) Field-effect electron mobility of the InAs NWFET as a function of gate voltage before and after the Au cluster decoration ( V). (e) TEM image of the InAs NW after the decoration and inset is the diameter distribution statistic of decorated Au clusters. (f) HRTEM image of the Au cluster decorated InAs NW and inset is the corresponding FFT. Reproduced from [39]. with permission from WILEY-VCH Verlag GmbH and Co. KGaA.
