Superior PSZ-SOD Gap-Fill Process Integration Using Ultra-Low Dispensation Amount in STI for 28 nm NAND Flash Memory and Beyond

Figure 1

(a) The flow of PSZ-SOD process in STI for 28 nm node NAND flash. The schematics of PSZ-SOD flow: (b) PSZ-SOD liner deposition, (c) PSZ-SOD coating, (d) furnace curing for PSZ-SOD converting to silicon oxide, (e) chemical-mechanical polishing of silicon oxide, (f) STI etching back 1 process, (g) STI etching back 2 process, and (h) removing of polysilicon of floating gate.

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