Effect of Top-Region Area of Flat-Top Pyramid Patterned Sapphire Substrate on the Optoelectronic Performance of GaN-Based Light-Emitting Diodes

<div>Fabrication processes of FTP-PSS: (a) growth of a SiO<sub>2</sub> layer on the<i> c</i>-plane sapphire by PECVD, (b) preparation of a thick PR on the SiO<sub>2</sub> layer by spin-coating, (c) performing the photolithography technique to open the PR mask, (d) formation of the round-shaped SiO<sub>2</sub> layer via the buffered oxide etching and removal of the PR mask, (e) wet etching to the sapphire substrate using a mixed H<sub>2</sub>SO<sub>4</sub> : H<sub>3</sub>PO<sub>4</sub> (3 : 1) solution at 250°C for 30 min, and (f) removal of the SiO<sub>2</sub> mask layer using a HF solution.</div>

Journal of Nanomaterials

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Figure 1

Figure 1: Effect of Top-Region Area of Flat-Top Pyramid Patterned Sapphire Substrate on the Optoelectronic Performance of GaN-Based Light-Emitting Diodes 

Figure 1 | Effect of Top-Region Area of Flat-Top Pyramid Patterned Sapphire Substrate on the Optoelectronic Performance of GaN-Based Light-Emitting Diodes 