Research Article

Procedures and Properties for a Direct Nano-Micro Integration of Metal and Semiconductor Nanowires on Si Chips

Figure 10

(a) 𝐼 s d - 𝑉 s d characteristic of anodized Ti nanowires as a NWFET, (b) the magnified 𝐼 s d - 𝑉 s d plot for zero gate voltage in forward and reverse bias, (c) logarithmic plot corresponding to (a), (d) transfer characteristics of nanowire-FET at different source drain voltages ( 𝑉 s d ).
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