Journal of Nanotechnology / 2012 / Article / Fig 12

Review Article

Vertical Silicon Nanowire Platform for Low Power Electronics and Clean Energy Applications

Figure 12

(a) Cross-sectional TEM image of vertical SiNW GAA JL-SONOS: diameter of wire is 20 nm and gate length 120 nm, (b) Cross-sectional TEM image of gate stack showing ONO thickness 5/7/7 nm. (c) AFM image scanned on 1 × 1 μm2 surface area that reveals the formation of Si-NC with a density of 7.5 × 1010/cm−2. (Reprinted with permission from [45]. [2011] IEEE.)
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