Journal of Nanotechnology / 2012 / Article / Fig 19

Review Article

Vertical Silicon Nanowire Platform for Low Power Electronics and Clean Energy Applications

Figure 19

(a) Short circuit current and open circuit voltage of the SiNP textured solar cell at various 𝐿 𝑛 . Inset is the efficiency of the SiNP textured and untextured solar cell; (b) photo-generated carrier profile 𝐺 in a Si nanopillar textured thin film solar cell at 𝐿 𝑛 = 0 . 6 μm. (Reprinted with permission from [59]. [2010] IEEE.)
492121.fig.0019a
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