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Journal of Sensors
Volume 2010, Article ID 920693, 17 pages
Review Article

CMOS Image Sensor with On-Chip Image Compression: A Review and Performance Analysis

Smart Sensory Integrated Systems (S2IS) Lab, Electronic and Computer Engineering Department, Hong Kong University of Science and Technology, Kowloon, Hong Kong

Received 4 May 2010; Revised 16 August 2010; Accepted 21 September 2010

Academic Editor: Isao Takayanagi

Copyright © 2010 Milin Zhang and Amine Bermak. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.


Demand for high-resolution, low-power sensing devices with integrated image processing capabilities, especially compression capability, is increasing. CMOS technology enables the integration of image sensing and image processing, making it possible to improve the overall system performance. This paper reviews the current state of the art in CMOS image sensors featuring on-chip image compression. Firstly, typical sensing systems consisting of separate image-capturing unit and image-compression processing unit are reviewed, followed by systems that integrate focal-plane compression. The paper also provides a thorough review of a new design paradigm, in which image compression is performed during the image-capture phase prior to storage, referred to as compressive acquisition. High-performance sensor systems reported in recent years are also introduced. Performance analysis and comparison of the reported designs using different design paradigm are presented at the end.