Research Article
A 5 V-to-3.3 V CMOS Linear Regulator with Three-Output Temperature-Independent Reference Voltages
Table 2
The comparison of the proposed linear regulator to other existing linear regulators.
| | Specifications | 2007 [4]
TCS-I | 2010 [6]
TCS-II | 1998 [7]
JSSC | 2010 [10]
Microelectronics | This work |
| | Process | 0.35 μm
CMOS | 0.5 μm
CMOS | 2 μm
CMOS | 0.35 μm
CMOS | 0.18 μm
CMOS | | Supply voltage (V) | 3 | 4.2 | 1 | 1.8 | 5 | | Quiescent current (μA) | 65 (without reference circuit) | 50 (without reference circuit) | 23 (without reference circuit) | 492 (without reference circuit) | 247.6 (with reference circuit) | | Load regulation (mV/mA) | NA | 1.2 | 0.4 | 0.013 | 0.4 | | PSRR (dB) | −53
(1 KHz) | N/A | NA | NA | −42.85
(60 Hz) | | Settling time | 15 us | 4 us | 70 us | 50 ns | 50 ns | | Maximum output current (mA) | 50 | 100 | 50 | 180 | 200 | | Chip size (mm2) | 0.12 | 0.263 | 1.375 | 0.205 | 0.16 |
|
|
