Constructing Dynamic Multiple-Input Multiple-Output Logic Gates

Figure 4

Different 𝑘 regions for different three-input and two-output logic gates where 𝑦=𝐼₂+𝐼₁+𝐼₀−𝑘, with the rules −𝛽₀<𝑦<𝛽₀,𝐼_out0=0;𝑒𝑙𝑠𝑒𝐼_out0=1 and −𝛽₁<𝑦<𝛽₁,𝐼_out1=0;𝑒𝑙𝑠𝑒𝐼_out1=1. We can obtain different kinds of multiple-input multiple-output logic gates by changing 𝑘.