380345.fig.008
Figure 8: Simulation results of time sequences from top to bottom: panel 1, panel 2, and panel 3 show a stream of input signals , , and , determining input set . Panel 4 shows the control signal of for different logics. Panel 5 shows the output signal . Both these logical functions are consistent with the corresponding values indicated in Panel 4. Panel 6 shows the signals of , , and , respectively.