Research Article | Open Access
Chih-Lung Shen, Kuo-Kuang Chen, "Single-Stage Coupled-Inductor Sepic-Type HB-LED Driver with Soft Switching for Universal Line Input", Mathematical Problems in Engineering, vol. 2012, Article ID 593568, 17 pages, 2012. https://doi.org/10.1155/2012/593568
Single-Stage Coupled-Inductor Sepic-Type HB-LED Driver with Soft Switching for Universal Line Input
This paper proposes a single-stage Sepic-type high brightness LED driver for universal line input to perform power factor correcting and LED dimming. In the driver, a coupled inductor is introduced to replace with two separate inductors to lower volume and cost. A soft-switching cell is embedded into the driver to obtain zero-voltage switching (ZVS) feature so as to furthermore improve driver efficiency. Mathematical derivation and detailed discussion is presented. A prototype is designed, analyzed and implemented, which demonstrates the feasibility of the driver and verifies the theoretical analysis.
Power electronic devices with front-end rectifier are widely used in industry, commerce, and transportation, which generate current harmonics, produce power pollution, and result in low power factor. Therefore, there are international harmonic standards (such as IEC-1000 and IEC-555) to confine power pollution. In order to meet the requirements of the standards, the input current waveform of a device has to be shaped by a power factor corrector (PFC) to eliminate current harmonics and improve power factor.
The PFCs can be briefly classified into two types. One is passive and the other is active. Passive-type PFC is mainly constructed by inductors and capacitors. Low efficiency, heavy weight, and large volume are its major disadvantages. Besides, in general power factor merely is improved to around 0.8. For active type, active switch, diode and energy-stored component are used to achieve near unity power factor, of which topologies have Buck, Boost, Buck-Boost, ′Cuk, Zeta, Sepic, and Flyback. Conventional Buck-type PFC can obtain an output voltage smaller than ac input voltage. However, only a power factor of 0.95 is met . The Boost structure attains better power factor correction feature but its output voltage is higher than ac-side voltage, and power components withstand high voltage stresses [2, 3]. The Buck-Boost PFC can obtain an output voltage magnitude either larger or smaller than the input. Nevertheless, there is a polarity reversal on the output, and an isolation driver for active switch is required [4, 5]. The ′Cuk, Zeta, Sepic, and Flyback topologies can resolve the problems caused from the Buck-Boost. Among them the Sepic type possesses better performance in total harmonics distortion (THD), efficiency, and power factor correction [6–13]. However, the Sepic PFC needs two separate inductors like ′Cuk and Zeta.
In this paper a dsPIC-based coupled-inductor Sepic-type converter for high-brightness light-emitting-diode (HB LED) lighting applications is presented, which can not only step down input voltage directly but also perform power factor correcting, drive LED panel, and complete dimming function. A soft-switching cell is proposed to reduce switching losses, improving efficiency. In addition, a bypass circuit in parallel with each LED is also proposed, which is cost-effective and suitable for IC process. A dual-loop control approach, which contains inner control loop and outer control loop to shape input current and to regulate output voltage, is also presented. In LED panel, the current of each LED string is sensed and controlled to accomplish current sharing and dimming feature. A 100 W prototype is designed, analyzed, and implemented. Simulations and practical results have demonstrated the feasibility of the single-stage Sepic-type LED driver and verified the aforementioned functions.
2. Power Stage Configuration
For high mains voltage or in low output voltage application, in general a Boost-type PFC is cascaded with a full-wave rectifier in the input and a step-down dc/dc converter in the output, as shown in Figure 1. The PFC stage shapes a high-crest-factor current caused by the full-wave rectifier into a purely sinusoidal waveform in phase with line voltage. However, the input voltage also is boosted. Therefore, it is required that a dc/dc converter is adopted to drop voltage for dc load. Power is processed by two stages, a PFC and a dc/dc converter, lowering overall efficiency and increasing cost. To release the mentioned drawbacks, a single-stage step-down PFC is adopted to simplify the structure of power-conversion stage, as shown in Figure 2, in which the PFC stage performs power factor correcting as well as steps down its input voltage to a desired level. In this paper, a dsPIC-based Sepic-type configuration is presented to serve as the single-stage step-down PFC for HB-LED driving, as shown in Figure 3. Figure 4 shows the corresponding main-stage schematic, in which the diodes and are introduced to prevent opposite current from flowing through inductors and , respectively. In Figure 4, the two separate inductors and can be coupled magnetically. In addition, a proposed soft-switching cell, including an active switch , an inductor , and a capacitor , to achieve zero-voltage switching (ZVS) feature, is embedded into the power stage to reduce switching loss. Figure 5 is the derived single-stage coupled-inductor soft-switching Sepic-type HB-LED driver.
3. Operation Principle of Power Stage
In Figure 5, while the soft-switching Sepic-type HB-LED driver operates in boundary conduction mode and with peak current control, a high power factor can readily be achieved. As a result, the envelope of the input current will follow the shape of line voltage to be sinusoidal, leading to unity power factor. As the resonant frequency of the soft-switching cell is much higher than switching frequency of main power circuit, over a switching cycle the operation of the driver can be divided into eight modes. Figure 6 is the corresponding circuits, and the related conceptual key waveforms are shown in Figure 7. The eight operation modes during a switching period are discussed as follows.
(1) Mode 1 (, Figure 6(a))
During this time interval, switch is on and off. The inductor currents of and are linearly built, and the capacitor dumps energy to inductor by the way of , , and . At the same time, the capacitor supplies power for load. The time constant determined by capacitance of and load resistance is much larger than switching period so that output voltage can be regarded as a constant. At time , this mode is ended and is turned off. In mode 1, the voltage across the resonant inductor, can be calculated by in which expresses rectified half sine wave, is the cut-in voltage of diode , and stands for the turn-on voltage across switch . Then, inductor current is determined as follows: In (3.2), the initial value of inductor current (0) is found by the end of mode 8.
(2) Mode 2 (, Figure 6(b))
The switch is turned off at . The inductor discharges through the path of , resonant inductor , and parasitical capacitor . Meanwhile, the capacitor still dumps energy to , and dc load draws power from . Since typical value of is far smaller than the capacitance of , the voltage across increases rapidly. Applying KVL to the loop, ----, one can obtain the following equivalent: in which is the cut-in voltage of diode . Rearranging (3.3) yields The () is the initial value of at mode 2, which can be found by (3.2). At , the voltage reaches and this mode is terminated.
(3) Mode 3 (, Figure 6(c))
During this time interval, inductors and still discharge energy, and voltage increases. The diode D7 starts conducting, and the voltage across is equal to output voltage . Therefore, dumps energy to the output, and the inductor current is expressed by The capacitor will be charged to , which is also the voltage stress of . That is,
(4) Mode 4 (, Figure 6(d))
Both inductors and release energy continuously but capacitor charges. The parasitical capacitor of switch starts dumping energy by the way of and until drops to zero. The resonant frequency of the loop -- and the voltage across can be found as follows, respectively:
(5) Mode 5 (, Figure 6(e))
The body diode of conducts, and inductor resonates with . The resonant frequency in the soft-switching cell during this mode is In addition, the following relationship holds: The is the voltage drop on the body diode . According to (3.9), resonant inductor current can be obtained by:
During this time interval, switch is tuned on with ZVS. Operation of the driver enters into next mode as the current decreases to zero.
(6) Mode 6 (, Figure 6(f))
The energy stored in resonant capacitor is dumped to via . As a result, the current increases negatively. In this time period, inductors and release energy but charges. At , is turned off and this mode is terminated.
(7) Mode 7 (, Figure 6(g))
Switches and are off. The stored energy in the parasitical capacitor is drawn by inductor and decreases. This mode ends when drops to zero. In this mode, the inductor resonates with under the frequency of
(8) Mode 8 (, Figure 6(h))
The energy stored in is discharge by the way of , , , and . In this time interval, switch is triggered. This mode is terminated while equals zero. A complete switching cycle is ended at , at which switch has been turned on again.
4. Control of Driver
The proposed HB-LED driver not only steps down input voltage but also performs power factor correcting and functions as dimming feature. Dual-loop control and average-current control are adopted to achieve power factor correction and to regulate HB-LED current, respectively.
4.1. Control of Power Factor Correction
Figure 8 shows the block diagram of the dual-loop control. Zero-crossing point of the line voltage is detected by the zero-crossing detector, and, then, the sine-wave generator produces a unity sine wave in phase with the line voltage. In the dual-loop control, output voltage is fed back and compared with reference for determining the amplitude of current command. Meanwhile, input current is sensed and compared with current command for the determination of appropriate control signals driving and . With the dual-loop control, input current shaping and output voltage regulating are readily accomplished over universal line-voltage range.
The driver operates in boundary conduction mode to perform power factor correcting. Therefore, on-time interval of the main switch within one switching cycle can be represented as The stands for peak value of inductor current through and is obtained from In (4.2), is the line frequency and expresses the amplitude of line current. In addition, off-time interval of the main switch within one switching cycle is found by Suppose that voltage drop on the input diodes can be neglected. Thus, can be expressed as where is the amplitude of line voltage. From (4.1)–(4.4), determination for and of a control signal can be further derived and becomes Since the switching frequency of the driver, , is with the relationships of (4.5), expression for is rewritten as
4.2. Dimming Control of HB-LED Panel
Each string current of HB-LED panel is controlled by current regulator to achieve current sharing and dimming feature. The current regulator mainly includes an active switch and a current sensor, as shown in Figure 9. String current is sensed, and, then, according to its average value the duty ratio of the active switch is determined so as to accomplish 400 Hz burst-mode current control. Consequently, string current can be controlled to achieve luminance balance and dimming feature. The associated average-current calculation and dimming signal determination are all-digital implementation, of which control block diagram is illustrated in Figure 10.
In Figure 9, duty ratio of the active switch in the jth LED string, , can be expressed as where denotes the period of dimming signal and is the on-state time interval of the active switch in the jth LED string. In Figure 10, average value of the jth-string sensed current is calculated by Additionally, while the jth active switch is closed, a corresponding current through the jth LED string has to be In (4.10), is the total number of LEDs in the jth string; and are the forward voltage and equivalent series resistance of LED, respectively. Since can be also evaluated by then, from (4.9)-(4.11) the following equivalent holds: Based on (4.12), to determine , the values of and should be given in advance, which leads to the determination error caused from the aging effect of LED. To avoid the drawback, the difference between the average sensed current and a reference current is amplified and then compared with a triangular waveform so as to fulfill pulse-width-modulation (PWM) current control, as shown in Figure 10. The corresponding control law can be expressed as follows: where is the peak value of the triangular waveform and stands for a constant. The is in the range of 0-1.
In this paper, a by-pass circuit is also presented, which is in parallel with LED, as shown in Figure 9. While LED being out of order, it is triggered and provides an alternative path to continue string current. As the presented by-pass circuit conducts, voltage drop across its terminals is about 1 V. Compared with conventional single-zener-diode by-pass circuit, of which conduction voltage drop is larger than 3.3 V, the power dissipation of the presented by-pass circuit is much smaller than that of the conventional one.
5. Design Considerations
The inductances and capacitances, , , , and , influence the performances of the single-stage driver significantly. Determinations for and are presented as follows: in which is the turns ratio of the coupled inductors, denotes the magnetizing inductance, and and stand for leakage inductances of winding 1 and winding 2, respectively. In addition, the capacitances and are obtained by where equals , and represent dc-bus voltage and its ripple component, in turn, and expresses the rms value of the minimum line voltage. The peak value of the inductor current can also be expressed as follows: Then, the filtered input current is determined by In addition, the power drawn from line voltage can be computed in the following:
In Figure 8, the output voltage is divided by the two resistors, and , with 1% accuracy such that the voltage can be described as Suppose that a 10-bit analog-to-digital converter (ADC) is used. Therefore, the ADC resolution is calculated as Thus, the maximum deviation of after analog-to-digital conversion is Accordingly, the deviation on the output voltage, , can be found by
6. Simulations and Hardware Measurements
A prototype of the proposed HB-LED driver is built to demonstrate the theoretical analysis and to verify the feasibility, of which controller is implemented on a 16-bit disPIC-30F4011 chip. The adopted microcontroller comprises a 10-bit ADC with conversion rate up to 500 Ksps, 9 input channels, 6 PWM outputs, and 5 16-bit timers. It fulfills the controlling of power factor correction, current sharing, and dimming. The driver has been designed according to the following specifications:input voltage: V,output power: 100 W,output current: 1.75 A,output voltage: 58 V,LED: LUMILEDS 1.2 W/3.42 V/0.35 A,LED panel: 5 strings, 17 pieces in series for each string.Component values and important parameters are determined as:: IRF730 (400 V/5.5 A),: 17N80C3 (800 V/17 A), = 1.2 mH, = 0.77 mH, = 0.1 mH, = 0.1 F, = 0.25 F, = 100 F, and = 0.05 F.Figure 11 is the waveforms of voltage and current of the main switch , while Figure 12 shows the waveforms of in the soft-switching cell. From Figures 11 and 12, it can be observed that zero-voltage switching (ZVS) feature is achieved by the both switches and . Figure 13 is the simulated waveform of the current . Figure 14 shows the simulated line voltage and input current when mains voltage is 110 V. For 220 V mains input, the simulated line voltage and input current are shown in Figure 15. Figure 16 shows the hardware measurement of line voltage and input current while mains voltage is 110 V. From Figures 13–16, it can be found that a unity power factor is achieved by the single-stage HB-LED driver. Figure 17 shows the harmonics of the input current measured by PM3000 and then compared with IEC6100-3-2 class C. From Figure 17, it can be observed that the line current harmonics are much less than the requirements of the standard. Power factor and efficiency measurements are shown in Figures 18 and 19, in turn, illustrating that high power factor and efficiency can be achieved by the single-stage HB-LED driver.
This paper has proposed a single-stage Sepic-type soft-switching HB-LED driver with coupled inductor for universal line input. The proposed driver not only can perform power factor correcting but also achieve zero-voltage switching feature and step down input voltage directly. Consequently, a unity power factor is obtained and efficiency is improved. In the driver, its output voltage can be much smaller than the ac-side voltage, reducing component stresses significantly. Therefore, the driver is suitable for the applications of high-line voltage and/or low output voltage. To drive LED panel, an all-digital controller is also presented for power factor correcting, dc-bus voltage regulating, current sharing, and LED dimming, which is implemented on a 16-bit disPIC chip. A prototype of the designed single-stage driver to ballast 100 W 58 V HB-LED panel has been built. The simulations and practical measurements have verified the feasibility and features of the single-stage HB-LED driver.
- M. Ilic and D. Maksimovic, “Averaged switch modeling of the interleaved zero current transition buck converter,” in Proceedings of the IEEE Power Electronics Specialists Conference, 2005, pp. 2158–2163, 2005.
- J. Rajagopalan, F. C. Lee, and P. Nora, “A general technique for derivation of average current mode control laws for single-phase power-factor-correction circuits without input voltage sensing,” IEEE Transactions on Power Electronics, vol. 14, no. 4, pp. 663–672, 1999.
- D. Maksimovic, J. Yungtaek, and R. Erickson, “Nonlinear-carrier control for high power factor boost rectifiers,” in Proceedings of the IEEE Applied Power Electronics Conference and Exposition, vol. 2, pp. 635–641, March 1995.
- C. Jingquan, D. Maksimović, and R. W. Erickson, “Analysis and design of a low-stress buck-boost converter in universal-input PFC applications,” IEEE Transactions on Power Electronics, vol. 21, no. 2, pp. 320–329, 2006.
- L. Petersen and R. W. Erickson, “Reduction of voltage stresses in buck-boost-type power factor correctors operating in boundary conduction mode,” in Proceedings of the IEEE Applied Power Electronics Conference and Exposition, vol. 2, pp. 664–670, February 2003.
- J. M. Kwon, W. Y. Choi, J. J. Lee, E. H. Kim, and B. H. Kwon, “Continuous-conduction-mode SEPIC converter with low reverse-recovery loss for power factor correction,” Proceedings of the IEE Proceedings of Electric Power Applications, vol. 153, no. 5, pp. 673–681, 2006.
- H. Y. Kanaan, K. Al-Haddad, G. Sauriole, and R. Chaffaï, “Practical design of a SEPIC power factor corrector with DC-voltage regulation,” in Proceedings of the International Symposium on Industrial Electronics (ISIE '06), pp. 964–969, July 2006.
- H. Y. Kanaan, K. Al-Haddad, and F. Fnaiech, “Switching-function-based modeling and control of a SEPIC power factor correction circuit operating in continuous and discontinuous current modes,” in Proceedings of the IEEE International Conference on Industrial Technology (ICIT '04), vol. 1, pp. 431–437, December 2004.
- T. Tanitteerapan and S. Mori, “Simplified input current waveshaping technique by using inductor voltage sensing for high power factor isolated sepic, cuk and flyback rectifiers,” in Proceedings of the IEEE Applied Power Electronics Conference and Exposition, vol. 2, pp. 1208–1214, March 2002.
- R. Zane and D. Maksimovic, “Nonlinear-carrier control for high-power-factor rectifiers based on flyback, cuk or sepic converters,” in Proceedings of the IEEE Applied Power Electronics Conference and Exposition, vol. 2, pp. 814–820, March 1996.
- N. Jayaram and D. Maksimovic, “Power factor correctors based on coupled-inductor sepic and cuk converters with nonlinear-carrier control,” in Proceedings of the IEEE Applied Power Electronics Conference and Exposition, vol. 1, pp. 468–474, February 1998.
- C. Jingquan and C. Chin, “Analysis and design of SEPIC converter in boundary conduction mode for universal-line power factor correction applications,” in Proceedings of the IEEE Power Electronics Specialists Conference, vol. 2, pp. 742–747, June 2001.
- S. Singh and B. Singh, “Voltage controlled PFC SEPIC converter fed PMBLDCM drive for an air-conditioner,” in Proceedings of the IEEE Power Electronics, Drives and Energy Systems, pp. 1–6, December 2010.
Copyright © 2012 Chih-Lung Shen and Kuo-Kuang Chen. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.