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Mathematical Problems in Engineering
Volume 2013, Article ID 436701, 14 pages
Research Article

Scheduling Semiconductor Multihead Testers Using Metaheuristic Techniques Embedded with Lot-Specific and Configuration-Specific Information

1Department of Industrial Engineering and Engineering Management, National Tsing Hua University, Hsinchu 300, Taiwan
2Department of Business Administration and Graduate Institute of Logistics Management, National Dong Hwa University, Hualien 974, Taiwan

Received 16 August 2013; Revised 22 October 2013; Accepted 23 October 2013

Academic Editor: Chin-Chia Wu

Copyright © 2013 Yi-Feng Hung et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Citations to this Article [1 citation]

The following is the list of published articles that have cited the current article.

  • Jae-Gon Kim, Seung-Kil Lim, and June-Young Bang, “Lot-Order Assignment Applying Priority Rules for the Single-Machine Total Tardiness Scheduling with Nonnegative Time-Dependent Processing Times,” Mathematical Problems in Engineering, vol. 2015, pp. 1–11, 2015. View at Publisher · View at Google Scholar