Low-Cost Design of an FIR Filter by Using a Coefficient Mapping Method

Table 2

Performance comparison of various 48-tap filter designs for generating 16-bit outputs.

Methods	Info.
	Architecture level	Gate level
	Area no. of add., sub., and reg.	Area (um^2)	Critical path delay (ns)	Throughput (Mbps)	Throughput/area (Kbps/um^2)
Binary	(220, 0, 48)	300284	12.61	1268	4225
CSD	(88, 74, 48)	299622	12.08	1324	4421
Paško et al. [1]	(76, 22, 48)	271357	15.08	1061	3910
Jang and Yang [3]	(72, 70, 48)	295567	15.27	1047	3545
Vinod et al. [4]	(62, 34, 48)	274025	14.32	1117	4077
Choo et al. [5]	(67, 24, 48)	259104	14.18	1128	4355
Takahashi and Yokoyama [6]	(78, 22, 48)	273902	15.28	1047	3823
Mahesh and Vinod [7]	(88, 0, 48)	255450	15.58	1271	4979
Kato et al. [8]	(64, 26, 48)	264240	14.46	1106	4187
Vinod et al. [9]	(62, 34, 48)	260976	14.25	1122	4303
Our method with binary format	(66, 0, 48)	244547 (4.3%)	11.45 (26.5%)	1397 (9.9%)	5713 (14.7%)
Our method with CSD format	(23, 33, 48)	241813 (5.3%)	11.58 (25.7%)	1382 (8.7%)	5715 (14.8%)