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Mathematical Problems in Engineering
Volume 2014, Article ID 136246, 11 pages
Research Article

Flash-Aware Page Replacement Algorithm

1School of Software Engineering, Chongqing University of Posts and Telecommunications, Chongqing 400065, China
2School of Computer Science, Chongqing University of Posts and Telecommunications, Chongqing 400065, China

Received 19 May 2014; Accepted 19 July 2014; Published 12 August 2014

Academic Editor: Massimo Scalia

Copyright © 2014 Guangxia Xu et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.


Due to the limited main memory resource of consumer electronics equipped with NAND flash memory as storage device, an efficient page replacement algorithm called FAPRA is proposed for NAND flash memory in the light of its inherent characteristics. FAPRA introduces an efficient victim page selection scheme taking into account the benefit-to-cost ratio for evicting each victim page candidate and the combined recency and frequency value, as well as the erase count of the block to which each page belongs. Since the dirty victim page often contains clean data that exist in both the main memory and the NAND flash memory based storage device, FAPRA only writes the dirty data within the victim page back to the NAND flash memory based storage device in order to reduce the redundant write operations. We conduct a series of trace-driven simulations and experimental results show that our proposed FAPRA algorithm outperforms the state-of-the-art algorithms in terms of page hit ratio, the number of write operations, runtime, and the degree of wear leveling.