High Real-Time Design of Digital Pulse Compression Based on FPGA

Table 1

FFT processing time comparisons (cycles).

FFT processors	Time	Comparisons with the proposed design
In place with single butterfly	24259	17967↑
Xilinx FFT IP	10427	4135↑
C6701 floating-point DSP	12000	5708↑
The proposed design	6292	—