<svg xmlns:xlink="http://www.w3.org/1999/xlink" xmlns="http://www.w3.org/2000/svg" style="vertical-align:-4.3443pt" id="M1" height="15.7437pt" version="1.1" viewBox="-0.0657574 -11.3994 26.6531 15.7437" width="26.6531pt"><g transform="matrix(.017,0,0,-0.017,0,0)"><path id="g113-73" d="M828 650H570L564 622C646 614 650 609 634 524L604 366H253L281 524C296 608 308 615 382 622L388 650H132L126 622C211 615 214 609 198 524L121 122C106 42 102 35 23 28L17 0H276L282 28C196 35 191 40 206 122L243 324H597L559 123C544 42 537 35 452 28L446 0H710L716 28C632 35 628 43 643 122L719 524C735 610 741 615 822 622L828 650Z"/></g><g transform="matrix(.012,0,0,-0.012,13.299,4.134)"><path id="g50-30" d="M1000 227C1000 351 905 451 780 451C658 451 590 380 530 279C465 385 388 451 261 451C168 451 38 376 38 210C38 98 121 -12 261 -12C381 -12 448 59 508 160C573 53 652 -12 780 -12C879 -12 1000 64 1000 227ZM485 199C434 109 370 25 271 25C188 25 133 117 133 241C133 355 189 414 249 414C357 414 426 302 485 199ZM903 204C903 70 852 25 790 25C681 25 611 136 552 240C603 330 669 414 768 414C855 414 903 321 903 204Z"/></g></svg> Controller Design for Asynchronous Hybrid Systems with Multiple Delays

<div>A dual-rate sampled-data system with sampling and holding delays.</div>

Mathematical Problems in Engineering

fig2

Figure 2

Figure 2: <svg xmlns:xlink="http://www.w3.org/1999/xlink" xmlns="http://www.w3.org/2000/svg" style="vertical-align:-4.3443pt" id="M1" height="15.7437pt" version="1.1" viewBox="-0.0657574 -11.3994 26.6531 15.7437" width="26.6531pt"><g transform="matrix(.017,0,0,-0.017,0,0)"><path id="g113-73" d="M828 650H570L564 622C646 614 650 609 634 524L604 366H253L281 524C296 608 308 615 382 622L388 650H132L126 622C211 615 214 609 198 524L121 122C106 42 102 35 23 28L17 0H276L282 28C196 35 191 40 206 122L243 324H597L559 123C544 42 537 35 452 28L446 0H710L716 28C632 35 628 43 643 122L719 524C735 610 741 615 822 622L828 650Z"/></g><g transform="matrix(.012,0,0,-0.012,13.299,4.134)"><path id="g50-30" d="M1000 227C1000 351 905 451 780 451C658 451 590 380 530 279C465 385 388 451 261 451C168 451 38 376 38 210C38 98 121 -12 261 -12C381 -12 448 59 508 160C573 53 652 -12 780 -12C879 -12 1000 64 1000 227ZM485 199C434 109 370 25 271 25C188 25 133 117 133 241C133 355 189 414 249 414C357 414 426 302 485 199ZM903 204C903 70 852 25 790 25C681 25 611 136 552 240C603 330 669 414 768 414C855 414 903 321 903 204Z"/></g></svg> Controller Design for Asynchronous Hybrid Systems with Multiple Delays 