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Mathematical Problems in Engineering
Volume 2017, Article ID 2461964, 11 pages
https://doi.org/10.1155/2017/2461964
Research Article

An Improved Memristive Diode Bridge-Based Band Pass Filter Chaotic Circuit

School of Information Science and Engineering, Changzhou University, Changzhou 213164, China

Correspondence should be addressed to Bocheng Bao; moc.621@oabnivrem

Received 10 July 2017; Revised 2 September 2017; Accepted 14 September 2017; Published 17 October 2017

Academic Editor: Yan-Wu Wang

Copyright © 2017 Quan Xu et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Abstract

By replacing a series resistor in active band pass filter (BPF) with an improved memristive diode bridge emulator, a third-order memristive BPF chaotic circuit is presented. The improved memristive diode bridge emulator without grounded limitation is equivalently achieved by a diode bridge cascaded with only one inductor, whose fingerprints of pinched hysteresis loop are examined by numerical simulations and hardware experiments. The memristive BPF chaotic circuit has only one zero unstable saddle point but causes complex dynamical behaviors including period, chaos, period doubling bifurcation, and coexisting bifurcation modes. Specially, it should be highly significant that two kinds of bifurcation routes are displayed under different initial conditions and the coexistence of three different topological attractors is found in a narrow parameter range. Moreover, hardware circuit using discrete components is fabricated and experimental measurements are performed, upon which the numerical simulations are validated. Notably, the proposed memristive BPF chaotic circuit is only third-order and has simple topological structure.

1. Introduction

Due to the unique nonlinear characteristics of memristors [1], an explosive growth study of memristor based circuits has been boosted up in the past years [216]. Unfortunately, induced by technical handicaps in fabricating nanoscale memristor, the commercial memristor is not expected to be available in the near future. Thus, various kinds of physically implementable equivalent circuits which can manifest the three fingerprints of memristors [17] have attracted much attention [2, 618]. Popularly, the circuits implemented by operational amplifiers and analog multipliers [712] as well as the circuits consisting of diode bridge cascaded with RC [1315], LC [16], and RLC [18] filters have been used for experimental measurements in memristor based circuits. The most significant feature of the memristive diode bridge emulators is ungrounded limitation, which makes it as a serial expandable and flexible element in designing memristor based circuit [19]. Focusing on simplifying the mathematical model, an improved memristive diode bridge emulator achieved by a diode bridge cascaded with only one inductor will be illustrated in this paper. The newly proposed memristor emulator has simpler structures but more practical application in memristor based circuit.

Numerous memristive dynamical circuits have been reported by introducing memristor into classical linear or nonlinear dynamical circuits [4, 5, 9, 13, 14, 16, 2023], from which complex dynamical behaviors, such as chaotic behaviors [4, 5, 20, 21], coexisting multiple attractors [9, 13], self-excited and hidden attractors [14, 22, 23], and chaotic and periodic bursting [16], have been revealed and analyzed by theoretical analyses, numerical simulations, and experimental measurements. It is worth noting that the stability depends on the memristor initial condition in a memristive dynamical circuit, leading to the occurrence of coexisting multiple attractors [9, 13]. The coexistence of different kinds of attractors, called multistability, reveals a rich diversity of stable states in nonlinear dynamical systems [12, 2432] and makes the system offer great flexibility, which can be used for image processing or taken as an additional source of randomness used for many information engineering applications [3237]. Therefore, it is very attractive to seek for a simple memristive chaotic circuit that has the striking dynamical behavior of coexisting multiple attractors.

In [13, 19], two memristive Chua’s circuits are proposed by bridging ungrounded limitation generalized memristors. Meanwhile, a simplest third-order memristive BPF chaotic circuit is realized by replacing the parallel resistor in classical BPF with a grounded limitation memristor in [38]. Inspired by the advantages of those methodologies in building chaotic circuit, a novel and simple memristive BPF chaotic circuit with complex dynamical behaviors is constructed from a second-order active BPF by replacing a series resistor with our proposed memristive diode bridge emulator. The newly proposed circuit has extremely simple circuit realization, and the dimension is only three. It is significant that the memristive BPF chaotic circuit has only one determined unstable saddle point and can generate complex dynamical behaviors. Particularly, the new finding of coexisting multiple attractors in such a simple memristive BPF circuit has not been previously reported.

The rest of the paper is organized as follows. In Section 2, the realization and mathematical model of the improved memristive diode bridge emulator is given and its fingerprints by adding sinusoidal voltage stimuli are illustrated. The schematic structure of the memristive BPF circuit and dimensionless state equations are introduced, and stability of the equilibrium point is investigated in Section 3. Complex dynamical behaviors are revealed numerically in Section 4. Coexisting multiple attractors are performed in Section 5. Some hardware experiments are performed to validate the correctness of the theoretical analyses and numerical simulations in Section 6. Finally, the conclusions are drawn in Section 7.

2. Improved Memristive Diode Bridge Emulator

Different from the diode bridge-based memristor emulators reported in [16, 18, 39], an improved memristive diode bridge emulator with much simpler circuit realization is designed as shown in Figure 1(a), where and represent the voltage and current at the input port 11′, respectively, and and stand for the voltage and current across the inductor .

Figure 1: Circuit scheme of the memristor emulator and its chaotic circuit. (a) Improved memristive diode bridge emulator; (b) third-order memristive BPF chaotic circuit.

Consider that the diode bridge is implemented by four unified diodes, where and represent the voltage across and the current through the diode (), respectively. The voltage and current relation for can be written aswhere and , , and are the model parameters of , which stand for the reverse saturation current, emission coefficient, and thermal voltage of the diode, respectively.

According to [39], there are two relations of = and = . By applying Kirchhoff’s laws, two node current equations are obtained asand two loop voltage equations are yielded as

By substituting (1) and (3) into (4), the voltage across can be solved as Then, by combining (1), (2), and (4) with (6), the voltage and current relation at the input port 11′ can be expressed asBy leading (6) into (5) and using , the state equation of inductor is modeled asThe mathematical models (7) and (8) are used to characterize the voltage and current relation of the improved memristive diode bridge emulator, which accords with the defining equations of the class of generalized memristors [4] and it can be implemented by inexpensive off-the-shelf discrete components easily.

In order to illustrate the frequency-dependent pinched hysteresis loops of the improved memristive diode bridge emulator, the circuit element parameters  mH and four 1N4148 diodes with  nA, , and  mV are selected, and a sinusoidal voltage source is considered as , where and are the stimulus amplitude and frequency, respectively.

When = 4 V is fixed and is set to 200 Hz, to 1 kHz, and to 3 kHz, respectively, the v-i curves are displayed in Figure 2(a), from which it can be seen that the hysteresis loops are pinched at the origin, and the lobe area decreases with the increase of the frequency, while when f = 200 Hz is fixed and is set to 3 V, to 4 V, and to 5 V, respectively, the v-i curves are plotted in Figure 2(b), which explains that the pinched hysteresis loop is regardless of the stimulus amplitude. The simulation results in Figure 2 show that the improved memristive diode bridge emulator can exhibit three fingerprints for identifying memristors [17].

Figure 2: Pinched hysteresis loops of the improved memristive diode bridge emulator in the v-i plane. (a) = 4 V with different frequencies; (b) = 200 Hz with different amplitudes.

Also, a hardware level on a breadboard is fabricated and Tektronix AFG 3102C is used to generate a sinusoidal voltage. The experimental results, as shown in Figure 3, are captured by Tektronix TDS 3034C to validate three fingerprints of the memristor emulator, from which the results from hardware circuit are unanimous to those revealed by numerical simulations. It is emphasized that the minor deviations are caused by small difference between numerical simulations and experimental measurements of the inductor parameter.

Figure 3: Experimentally measured pinched hysteresis loops of the improved memristive diode bridge emulator. (a) = 4 V with different stimulus frequencies; (b) = 200 Hz with different stimulus amplitudes.

3. Third-Order Memristive BPF Chaotic Circuit

A second-order active BPF circuit has a simple circuit topology, which contains only one amplifier, two capacitors, and four resistors [40]. In this paper, by replacing a series resistor with the proposed memristive diode bridge emulator, a third-order memristive BPF circuit is proposed, as shown in Figure 1(b). Therefore, the proposed memristive chaotic circuit is much simpler and more intuitive in practical realization than other memristive chaotic circuits reported in [1316].

3.1. Mathematical Model

The proposed circuit has three dynamic elements of capacitor , capacitor , and memristor , respectively, corresponding to three state variables of , , and . According to Kirchhoff’s circuit laws and constitutive relationships of basic circuit elements, a state equation set is written aswhere and .

DenoteEquation (9) can be rewritten in a dimensionless form asThus the parameter amount of the dimensionless equation (11) will decrease to three.

The circuit parameters shown in Figure 1 are selected as  nF,  mH,  Ω, = 50 Ω, = 1 kΩ, and four 1N4148 diodes with = 5.84 nA, , = 25 mV, which are used as typical circuit parameters. Therefore, the normalized parameters are calculated by (10) asIn our following work, the parameters given in (12) will be taken as typical system parameters to reveal dynamical behaviors in the third-order memristive BPF circuit.

3.2. Stability Analysis

Obviously, system (11) has only one zero equilibrium point . By linearizing (11) around the equilibrium point and keeping unchanged, the Jacobian matrix is obtained asThus, the eigenvalues at equilibrium point are yielded by solving the following characteristic equation:Correspondingly, the eigenvalues at equilibrium point are expressed asIt is notable that the values of and the symbol of at are considered to remain unchanged with c = 6.02 × 10–6 and positive . For the typical system parameters, the eigenvalues at are calculated aswhich implies that is always an unstable saddle.

3.3. Typical Chaotic Attractor

For the typical system parameters of (12) and the initial conditions of , phase portraits of the typical chaotic attractor in three different planes are numerically simulated by solving system (11) and shown in Figures 4(a), 4(b), and 4(c), respectively, and Poincaré mapping on section is depicted in Figure 4(d). It is noted that the proposed third-order memristive BPF circuit can generate chaos indeed.

Figure 4: Numerically simulated chaotic attractor under typical system parameters. (a) Phase portrait in the plane; (b) phase portrait in the plane; (c) phase portrait in the plane; (d) Poincaré mapping in the plane.

4. Dynamical Behaviors in Memristive BPF Chaotic Circuit

Consider that the parameter increases from 0.001 to 0.1 and the other parameters are selected as given in (12). Bifurcation diagrams of the system variable and first two Lyapunov exponents calculated by Wolf’s method [41] are presented as shown in Figure 5. Two sets of initial states, positive initial conditions colored in red and negative initial conditions colored in blue, are utilized in Figure 5(a). From Figure 5, striking dynamical behaviors including period, chaos, period doubling bifurcation, and coexisting bifurcation modes are observed. Different transitions to chaotic states, such as forward period doubling and crisis scenario are also discovered. The dynamical behaviors determined by the Lyapunov exponents are consistent well with those revealed by the bifurcation diagrams. Note that the bifurcation diagrams in the narrow region of 0.0145 < < 0.017 have imperfect bifurcation structures, that is, without bifurcation route from period to chaos. Therefore, there must exist an attractive basin with special initial conditions to be located [9]. Under these special initial conditions, a period doubling bifurcation route can be found in system (11), which leads to the coexistence of multiple attractors.

Figure 5: Dynamics with increasing in the memristive BPF chaotic circuit. (a) Bifurcation diagrams of x; (b) first two Lyapunov exponents.

When 0.001 ≤ ≤ 0.004, system (11) shows periodic behavior, while when 0.004 < ≤ 0.015, the first Lyapunov exponent is zero or positive alternately, which indicates the occurrences of periodic and chaotic behaviors. With the intervals of in 0.015 < ≤ 0.025 and 0.056 ≤ ≤ 0.096, the occurrences of period doubling bifurcation, reverse period doubling, and coexisting bifurcation modes are discovered. In 0.025 < < 0.056, system (11) locates in the region of chaos with a larger periodic windows near .

For different values of , phase portraits of system (11) in the plane are numerically simulated, as shown in Figure 6, where the initial conditions of the red and blue trajectories are the same as those used in Figure 5(a). These results just emulate the dynamical behaviors of period, chaos, period doubling bifurcation, and coexisting bifurcation modes emerging from system (11). Note that the chaotic attractor in Figure 6(e) is spiral structure, similar to that revealed in the delay system [42].

Figure 6: Numerically simulated phase portraits with different in the plane. (a) Period-1 limit cycle at a = 0.014; (b) coexisting period-1 limit cycles at a = 0.018; (c) coexisting period-2 limit cycles at a = 0.022; (d) coexisting chaotic attractors at a = 0.025; (e) chaotic attractor at a = 0.028; (f) period-3 limit cycle at a = 0.031.

5. Multiple Attractors Depending on the Initial Conditions

In this section, the special phenomenon of coexisting multiple attractors in system (11) is mainly concerned. The bifurcation diagrams of and Lyapunov exponents in the region of 0.0145 ≤ a ≤ 0.017 under different initial conditions are presented in Figure 7 to highlight the phenomenon of multiple attractors. The initial conditions are specified as and and the color settings are marked in Figure 7(a), respectively. Note that there exists different bifurcation route in concerned parameter region for different initial conditions, which leads to the existence of multiple attractors.

Figure 7: Bifurcation routes in the region of 0.0145 ≤ ≤ 0.017 with different initial states. (a) Bifurcation diagrams of under and ; (b) first two Lyapunov exponents under and .

In Figure 7(a), the narrow parameter range of can be divided into four different regions of I, II, III, and IV. In region I, two kinds of coexisting attractors, including chaotic attractor and limit cycle, are revealed. Coexisting limit cycles with different periods are given in region III, while, in regions II and IV, coexisting twin limit cycles and limit cycle are observed. Within two regions, phase portraits of coexisting multiple attractor with different topological structures are plotted in Figure 8.

Figure 8: Simulated multiple attractors. (a) Coexisting chaotic attractor and limit cycle with a = 0.015; (b) coexisting twin limit cycles and limit cycle with a = 0.0155.

6. Experimental Verifications

A hardware level on a breadboard is fabricated to validate the complex dynamics of the proposed memristive BPF chaotic circuit. The experimental prototype for the memristive BPF chaotic circuit is photographed and shown in Figure 9, where the passive elements of precision potentiometer and monolithic ceramic capacitor and manually winding inductor as well as the active devices of operational amplifier AD711KN with ±15 V DC power supplies are chosen in our experiment. Note that two auxiliary gadget circuits are hired in experimental measurements to obtain the terminal voltages of capacitors and . Additionally, the experimental results are captured by a Tektronix TDS 3034C digital oscilloscope in mode.

Figure 9: Photograph of the experimental prototype for the memristive BPF chaotic circuit: (a) is a global graph of digital oscilloscope connecting with hardware circuit breadboard, whereas (b) is an enlarged view of proposed hardware circuit breadboard.

Phase portraits in different planes under typical circuit parameters are easily observed, as shown in Figure 10. For convenience, the two capacitors and are adjusted to meet the variation of dimensionless parameter in our experimental measurements. When the two capacitors and turned as six different values, phase portraits in the plane are measured, as shown in Figure 11, where the phase portraits of coexisting attractors in Figures 11(b)11(d) are captured separately and handed with after-treatment. It is emphasized that the desired different initial capacitor voltages and inductor current are difficult to assign in hardware circuit, which are randomly sensed through turning on the hardware circuit power supplies again [9, 13]. Ignoring the minor deviations caused by parasitic parameters, the experimental results shown in Figures 10 and 11 match well with the results of numerical simulations in Figures 4 and 6.

Figure 10: Experimentally measured phase portraits under typical circuit parameters in different planes, where  Ω,  Ω,  kΩ,  mH, and  nF. (a) Phase portrait in the plane; (b) phase portrait in the plane; (c) phase portrait in the plane.
Figure 11: Experimentally measured phase portraits in the plane with different and , where  Ω,  Ω,  kΩ, and  mH. (a) Period-1 limit cycle at  nF; (b) coexisting period-1 limit cycles at  nF; (c) coexisting period-2 limit cycles at  nF; (d) coexisting chaotic attractors at  nF; (e) chaotic attractor at  nF; (f) period-3 limit cycle at  nF.

7. Conclusion

In this paper, a third-order memristive BPF chaotic circuit is presented, which is constructed by replacing a resistor in second-order active BPF with an improved memristive diode bridge emulator. Numerical simulations of the mathematical model and the corresponding hardware experiments are performed, which show that the memristive BPF chaotic circuit has only one zero unstable saddle and generates complex dynamical behaviors of period, chaos, period doubling bifurcation, and coexisting bifurcation modes. The most significant feature of the proposed memristive chaotic circuit is that the stability depends on the initial conditions of dynamic elements, thereby leading to the occurrence of coexisting multiple attractors. Besides, the proposed memristor is much simpler in practical circuit realization and the constructing memristive BPF chaotic circuit is realized with less discrete components.

Conflicts of Interest

The authors declare that they have no conflicts of interest.

Acknowledgments

This work was supported by the National Natural Science Foundation of China under Grant nos. 51607013, 51777016, and 61601062 and the Natural Science Foundations of Jiangsu Province, China, under Grant no. BK20160282.

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