Embedded FPGA Design for Optimal Pixel Adjustment Process of Image Steganography

Table 5

The execution time of the pixel-wise structure and the 10-pixel parallel structure.

	Cover image “Girl” of size 256 × 256, with secret image “Room” of size 128 × 256			Cover image “Tulips” of size 1024 × 1024, with secret image “Field” of size 512 × 1024
	Pixel-wise structure	10-pixel parallel structure	Speedup	Pixel-wise structure	10-pixel parallel structure	Speedup
	Execution time (seconds)	Execution time (seconds)		Execution time (seconds)	Execution time (seconds)
	0.013110	0.001680	7.8	0.210302	0.025910	8.1