FPGA Realization and Lyapunov–Krasovskii Analysis for a Master-Slave Synchronization Scheme Involving Chaotic Systems and Time-Delay Neural Networks

Figure 7

Block diagram describing the top-level description of the proposed implementation for the Genesio–Tesi and Liu trackers, where the dashed blocks represent (a) the chaotic system to be tracked given in (31) or (32), (b) the delayed neural network given in (33), (c) the control law given in (34), and (d) the Euler integration method (35).