FPGA Delay-Oriented Process Mapping Algorithm of Xiangxi Minority Based on LUT

Table 2

Measurement results and theoretical analysis results.

Item	MDBP-ACO	Vector VM	EFFD	PMOC	FBG	InGaAs
FPGA	3.26	5.53	4.02	3.66	5.69	3.28
Delay	4.24	3.3	3.05	2.26	4.36	4.85
Process mapping	4.98	1.35	3.12	4.46	4.09	3.24
Virtual machine	5.97	2.24	5.2	2	5.12	1.06
VP-SLAM	2.74	2.22	5.15	4.15	6.83	5.03
Resources	5.22	2.16	6.33	3.82	2.39	5.37