A Collocation-Based Algorithm for Analyzing Bifurcations in Phase Locked Loops with Tanlock and Sawtooth Phase Detectors

Harb, Bassam A.; Al-Ajlouni, Ahmad; Eyadeh, Ali

doi:https://doi.org/10.1155/2018/8532546

Mathematical Problems in Engineering

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Research Article | Open Access

Volume 2018 | Article ID 8532546 | https://doi.org/10.1155/2018/8532546

A Collocation-Based Algorithm for Analyzing Bifurcations in Phase Locked Loops with Tanlock and Sawtooth Phase Detectors

Bassam A. Harb,¹Ahmad Al-Ajlouni,¹and Ali Eyadeh¹

Academic Editor: Yakov Strelniker

Received14 Mar 2018

Accepted11 Jun 2018

Published04 Jul 2018

Abstract

Analysis of bifurcation of second-order analog phase locked loop (PLL) with tanlock and sawtooth phase detectors is investigated. Both qualitative and quantitative analyses are carried out. Qualitatively, the basin boundaries of the attractors were constructed by plotting the stable and the unstable manifolds of the system. The basin boundaries show that the PLL under consideration for certain loop parameters has a separatrix cycle which terminates the limit cycle (out-of-lock state) and the loop pulls-in. This behavior is known in literature as homoclinic bifurcation and the value of the bifurcation parameter where this process occurs is called the pull-in range. Quantitatively, we propose a collocation-based algorithm to compute the separatrix cycle and the pull-in range. The separatrix cycle is approximated by a finite set of harmonics N with unknown amplitudes and by utilizing the fact that this limit cycle bifurcates from a separatrix cycle, a system of nonlinear algebraic equations is derived. For given values of filter parameters and gain, the algorithm numerically solves for the unknown amplitude of the harmonics and the value of the pull-in range simultaneously by evaluating the system at the collocation points. Results demonstrate that phase locked loop with sawtooth phase detector characteristics has the wider pull-in range followed by tanlock and sinusoidal, respectively.

1. Introduction

Phase locked loop is an electronic device with a voltage-controlled oscillator that is continuously adjusted to match the phase or frequency of a sinusoidal input signal. It is an essential part in many electronic circuits used for the demodulation of Amplitude Modulation (AM) and a BPSK (Binary Phase Shift Keying) signals. PLL is used as frequency synthesizers where a stable frequency at multiples of an input frequency can be obtained [1, 2]. PLL is used in modern wireless communication systems for synchronization, clock synthesis, and jitter reduction. In Code Division Multiple Access (CDMA) direct sequence spread spectrum systems (DS-SS), PLL is used to ensure exact code phase timing estimate. Such timing is influenced by clock offsets and by Doppler [3]. Moreover, phase locked loop frequency synthesizers are used in the design of transceivers in wireless communication systems [4]. A classical PLL consists of three components: phase detector, low pass filter, and voltage-controlled oscillator. Figure 1 shows the nonlinear model of the PLL under consideration where phase detector is modeled by the nonlinear function g().

The closed loop phase error φ is given by φ ≡ t - where is the frequency of the incoming signal and is the phase of the VCO. Other voltage-controlled oscillator parameters are the VCO gain () and the free running frequency (). The quantity = - is known in the literature as the loop detuning frequency whereas the closed loop gain is denoted by G. The role of the loop is to match the phase of the signal out of the VCO with the phase of the input signal. It is known that the phase error which is the solution of the autonomous, nonlinear differential equation describing the closed loop phase error loop can be in two different states. One is called the equilibrium state (phase-lock) where the phase error is constant and asymptotically stable and the other one is called the out-of-lock state (false lock) where the phase error is a limit cycle (periodic solution) [5]. Of interest here is the behavior of this limit cycle and how does this limit cycle affect the pull-in process. For second-order PLL, previous results showed that a limit cycle exists as a result of bifurcation from a separatrix cycle (homoclinic bifurcation). The value where bifurcation occurs ( = ) is found to be the value of the pull-in range; i.e., for values of < , the loop pulls-in and the PLL is said to be phase locked, whereas for values of > , a limit cycle bifurcates and in this case, the PLL is said to be false-locked. This behavior will be discussed analytically later in this paper. Many studies have been conducted and results concerning nonlinear analysis and bifurcations in phase locked loops can be found in the literature [6–8]. For example, the work by Stensby [9] and Harb and Stensby [10] showed that second-order phase locked loop undergoes saddle-node bifurcation. Stensby and Harb [11] proposed a numerical technique based on Galerkin procedures to compute the pull-in range of a second-order, Type I PLL with sinusoidal phase detector. Later Harb and Ajlouni [12] used a collocation-based algorithm for determining the pull-in range in second-order PLL with sinusoidal phase detector. Harb [13] proposed an iterative algorithm to solve for the pull-in range for different phase detector characteristics. Higher order phase locked loops have been studied in the literature as well. For example, Harb and Harb [14] studied third-order phase locked loop where the loop undergoes Hopf bifurcation and by using the multiple scale method they computed the limit cycle which was born as a result of this bifurcation. Monteiro et al. [15] computed the capture range of third-order PLL based on the location of the equilibrium points. Piquira et al. [16] used bifurcation theory in determining the lock-in range for third-order phase locked loops. The effect of time delay on the pull-in range for phase locked loop has been studied in the literature [17]. The work by Buckwalter and York [18] studied the effect of time delay on the pull-in range of high frequency phase locked loop with sinusoidal phase detector. Harb [19] studied the effect of time delay in PLL with tanlock and sawtooth phase detector characteristics. Stensby [20] derived an exact formula for computing the pull-out frequency for a second-order Type II PLL with triangular phase detector. The idea of synchronization in coupled phase locked loop was investigated by Buckwalter et al. [21] using harmonic balance technique.

Digital phase locked loop with tanlock phase detector characteristics has gained a great attention in literature but less effort has been paid to analog PLL with tanlock and sawtooth phase detectors [22–27]. In this paper, a collocation-based algorithm is used here to analyze bifurcations and computing the pull-in range of a second-order, Type II phase locked loop with tanlock and sawtooth phase detector characteristics. The effect of using different phase detector on the pull-in range will be evaluated and more attention will be paid to the qualitative analysis where the basins of attraction (equilibrium points and limit cycles) are identified. Moreover, the behavior of the attractors as one of the loop parameters changes will be analyzed and will be used in the formulation of the two parts of the algorithm. The first part approximates the limit cycle by a finite number of harmonics with unknown amplitudes. These amplitudes constitute 2N+1 unknowns that must be found. With frequency detuning, where the limit cycle exists as another unknown, the total number of unknowns will be 2N+2 to be determined. By evaluating the limit cycle at the collocation points, a set of (2N+1) algebraic equations is obtained. In order to solve for the unknowns simultaneously, one more equation is required which constitutes the other part of the algorithm and is obtained by evaluating the limit cycle at the saddle point. Given values of loop parameters and loop gain, the algorithm computes one period of the separatrix cycle and the value of detuning frequency ( = ) where the loop pulls-in.

The organization of the paper is as follows: Section 2 contains the mathematical model of the PLL under investigation. The qualitative behavior of the PLL is presented in Section 3. Section 4 discusses the proposed method and the simulation. Results and conclusions are presented in Section 5.

2. Second-Order, Type II Phase Locked Loop Model

In this section, the nonlinear differential equation that characterizes the dynamics of the PLL shown in Figure 1 is derived. The loop filter is given by the following transfer function:and the phase detector characteristics, g(φ), is periodic function with period of 2π. The general form of the closed loop phase error satisfies [10]where G is the closed loop gain and is defined as the difference between the frequency of the incoming signal () and the VCO free running frequency (). In this paper, a tanlock and sawtooth detectors are used. The general form of the tanlock phase detector is given by A sinusoidal phase detector is obtained by letting γ = 0, while, for γ = 0.816, the phase detector becomes sawtooth.

3. Qualitative Analysis of Second-Order Phase Locked Loop

In this section, the behavior of the solution of the nonlinear differential equation is explained qualitatively. A PLL with sinusoidal phase detector characteristic is assumed here for the analysis. In this case, the nonlinear differential equation (2) becomesThe system has two equilibrium points which are given byWith all parameters strictly positive, the set of equilibrium points given by (5a) are stable while those given by (5b) are unstable (saddle points). The bifurcation diagram for the system is shown in Figure 2.

In the figure, the x-axis represents φ and the y-axis represents the parameter . The diagram is plotted at fixed values of b = 0.1; a = 0.4; and G = 0.5 (the only varying parameter is ). The blue line stands for stable equilibrium point (knot or focus) where the red line stands for the saddle point. The empty circle stands for the saddle point bifurcation. This bifurcation occurs at the point . Two equilibrium points occur after this bifurcation—the stable and the unstable (saddle) points. The square symbol stands for the homoclinic bifurcation (saddle–saddle connection). The homoclinic bifurcation damages the limit cycle—only equilibrium points exist in this system at the values of lower than the one corresponding to the ordinate of the square. Two different attractors coexist in the region between the circle and the square—a stable limit cycle and a stable equilibrium point. The basin boundaries of these attractors can be constructed by plotting the stable and the unstable manifolds of the system. To do that, all parameters of the system are fixed as before; the only variable parameter is . Figures 3, 4, and 5 show the stable (blue) and the unstable (red) manifolds for different values of . All initial conditions inside the red “tongue” (at = 1.8 and = 1.4) are attracted to the stable fixed point; all initial conditions outside the “tongue” are attracted to the stable limit cycle. The parameter value = 1 represents the system state after the homoclinic (separatrix cycle) bifurcation; the limit cycle does not exist anymore; the only attractor is the stable equilibrium point. Of course, all manifolds are periodic by 2π. Note that x = φ and y = dφ/dt in the plots.

3.1. Equilibrium Points and Their Stability

In this section, the equilibrium points will be determined. Also, the type and stability of these points will be identified for tanlock phase detector given by (3). Substitute (3) into (2) to getDefine .

Then (6) can be written asOf interest here are the points where the loop is in the phase locked state. This is found by letting in (7). By doing so, equilibrium points exist at [13]where c₁ = b₁ / (a₁ (1 + γ)); c₂ = γ c₁, = / G., b₁ = b / G, a₁ = a / G.

The stability of the equilibrium points must be determined. In order to do that, one needs to find the eigenvalues of the Jacobian matrix. The Jacobian matrix is given bywhere is the derivative with respect to x. The eigenvalues are the roots of the following characteristic equation:It is shown that values of c₁ satisfy the following inequality [10]:The eigenvalues will be of opposite signs which imply the existence of a saddle point. This saddle point plays a major role for computing the separatrix cycle (saddle-saddle connection) and hence the pull-in range.

4. Computation of the Separatrix Cycle and the Pull-In Range

In this section, the value of detuning for which a separatrix cycle exists is computed using the collocation method. We follow the same procedures described by Harb and Al-Ajlouni [12]. The computational process is as follows. Consider the nonlinear ordinary differential equation given by (7). This equation can be written as orThe periodic limit cycle of (13) can be represented by a finite number of harmonics and is given by where N is the number of harmonics. The main task is to solve for the amplitudes of the harmonics and the value of where bifurcation occurs for given loop gain (G). Note that the amplitude coefficients () and are unknowns to be determined. The first (2N+1) algebraic equations are obtained by defining the residual R to beNext, we need to evaluate (15) at the collocation points which are the zeros of orthogonal polynomials such as Chebyshev polynomial or Legendre polynomial [28]. A Chebyshev polynomial of the first kind of degree (2N+2) is used which is given bySolving for at the collocation points j (zeros of the derivative of Chebyshev polynomial) yields (2N + 1) algebraic equations with (2N+2) unknowns which are given byAs mentioned before, another equation is required to solve for the 2N+2 unknowns simultaneously. This equation is obtained from the qualitative analysis discussed in Section 3 where it is verified that the separatrix cycle must approach the saddle point. Note that (7) has a saddle point for a single value of which is given by (8). This result leads to the (2N+2)th which is given byNow, (17) and (18) have (2N+2) unknowns and (2N+2) equations. Solving these unknowns required initial estimates for the unknowns and a value for the loop gain (G). This is done by approximating the limit cycle with only DC component, α₀, and first harmonics, α₁ and β₁, and assuming other unknowns to be zeros. The following example illustrates the procedures.

Example 1. In what follows, a numerical example is presented to test the algorithm outlined above for several values of N. In this example, the loop filter parameters ( a = 100, b = 10) with N = 1 are used. In this case, the separatrix cycle is approximated byand becomesA Chebyshev polynomial of degree 4 is used here and is given byAfter normalization of T₄(x) in the interval x∈[−π, π] (note that one period of the separatrix cycle is needed), (21) becomes The values of collocation points are given by the zeros of the derivative of G₄(x).These values are substituted into (17) to get the following three algebraic equations:And the fourth equation is given bywhere is given by (8). To solve for the above system, MATLAB was used for this task. For a value of , a, b, and gain G, and using (23), initial guess is obtained for the coefficients (α_o, α₁, β₁, and ). For a specified number of harmonics (N), these estimated coefficients are supplied to the algorithm while other coefficients () assumed to be all zeros. Figures 6, 7, and 8 show the phase plane plots ( ϕ versus dϕ/dt) of one period of separatrix cycles computed for different values of gain G with N = 10 for tanlock, sawtooth, and sinusoidal phase detectors, respectively. Fixe values of a = 100 and b = 10 throughout the simulation. Figure 9 shows values of G (gain) and (pull-in detuning frequency) where a separatrix cycle exists for all phase detectors. Each point on this means that the PLL has a separatrix cycle. As (G, ) moves away from the graph, no separatrix cycle exists and the PLL may reach a stable equilibrium state (phase-lock) or out-of-lock state as discussed in Section 3 which means that the separatrix cycle is the boundary between the phase-lock and the out-of- lock states.

5. Conclusions

In this paper, new results on the nonlinear analysis of second-order phase locked loop with tanlock and sawtooth phase detector characteristics are reported. We have proved the existence of the separatrix cycle qualitatively which have not been addressed in the literature. The basin boundaries of the attractors were constructed by plotting the stable and the unstable manifolds of the system. The qualitative analysis showed that the PLL pulls in as a result of homoclinic bifurcations. The value of the bifurcation parameter (pull-in frequency) where this type of bifurcation occurs was computed via a collocation-based algorithm. Results showed that PLL with sawtooth phase detector characteristics has the wider pull-in range amongst all phase detectors considered in this study. These results should help system designer when evaluating other key performance parameters and the overall performance of the PLL.

Data Availability

The data used to support the findings of this study are included within the article.

Conflicts of Interest

The authors declare that they have no conflicts of interest.

Acknowledgments

The authors thank Minvydas Ragulskis, Professor of Applied Mathematics at Kaunas University of Technology of Lithuania, for his assistance in plotting the basin boundaries of the attractors.

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Copyright

Copyright © 2018 Bassam A. Harb et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

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