Secure Multiparty Computation and Trusted Hardware: Examining Adoption Challenges and Opportunities

Table 1

Comparison of the properties provided by classical SMC techniques with those provided by trusted hardware.

Technique	Required Trust	Code Integrity	Data Integrity	Secure Channel	Enforcement Mechanism	Overhead
Garbled Circuits	Minimal	Cut-and-choose	Cut-and-choose	Oblivious Transfer; garbled exchange		High
Homomorphic Encryption		Restricted ops: PHE/SWHE	Not built-in	Operations on encrypted data	Strong cryptography
Secret Sharing	Minimal, with exceptions (threshold)	Limited to well-defined splitting and reconstruction	Verifiable schemes	Secrets not exposed to shareholders		Scheme-dependent; generally high
Intel SGX	CPU, Intel	Local/Remote attestation of enclave contents; enclave only accessible through ECALLs		Shared secret set during attestation	CPU	Low
ARM TrustZone	Secure world OS and trustlets	Code and data in secure world not directly accessible by normal world components		Secure Monitor Call	CPU and bus logic
Specialized Hardware	Hardware elements	Sensitive data and critical code only appear within the (often tamperproof) hardware elements		Varies: encrypt if not hardware-confined	Hardware
(e.g., coprocessors)