Compact Implementations of HIGHT Block Cipher on IoT Platforms

Table 2

Comparison results of serial architectures @ 80 MHz.

Mode	Bits	Area (GEs)	Power (uW)	Latency	Tech.
Enc	1	1111/1625	5.412/0.303	2176	250/65
	2	1180/1738	6.498/0.337	1088
	4	1312/1926	8.234/0.392	544
	8	1604/2282	7.713/0.346	272
	64	2269/3033	9.394/0.383	34
	64 [2]	3048	—	34	250
Enc/Dec	1	1172/1711	5.538/0.308	2176	250/65
	2	1237/1809	6.534/0.338	1088
	4	1385/2004	8.462/0.391	544
	8	1695/2386	8.663/0.357	272
	64	2560/3322	12.58/0.454	34
	64 [5]	2608	10.8	34	350

Power consumption measured @ 100 KHz.