Compact Implementations of HIGHT Block Cipher on IoT Platforms

Table 6

F1 operation in 8-bit AVR instruction sets.

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Input: input data (X)

Output: output data (F1 = X<<<3 XOR X<<<4 XOR X<<<6)

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1: MOV TMP, X

2: LSL TMP

3: ADC TMP, ZERO

4: LSL TMP

5: ADC TMP, ZERO

6: MOV F1, TMP

7: SWAP F1//X<<<6

8: LSL TMP

9: ADC TMP, ZERO//X<<<3

10: EOR F1, TMP//X<<<3 XOR X<<<6

11: LSL TMP

12: ADC TMP, ZERO//X<<<4

13: EOR F1, TMP//X<<<3 XOR X<<<4 XOR X<<<6

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