A Lightweight AES Coprocessor Based on RISC-V Custom Instructions

Table 3

Onboard operation result of segmented image encryption.

Segment size/bytes	Original	Cipher	Total cycles^a	Throughput (Mbps)^a
256			40 736	471.56
512			34 267	560.59
1024			30 988	619.90
40 020^b			27 632	695.19

^aData excluding the cycle cost of communicating with peripherals. ^bNo segmentation.