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Scientific Programming
Volume 1, Issue 1, Pages 67-78

Assessing Programming Costs of Explicit Memory Localization on a Large Scale Shared Memory Multiprocessor

Silvio Picano,1 Eugene D. Brooks III,2 and Joseph E. Hoag2

1School of Electrical Engineering, Purdue University, West Lafayette, IN 47907, USA
2Massively Parallel Computing Initiative (MPCI), Lawrence Livermore National Laboratory (LLNL), Livermore, CA 94550, USA

Received 25 February 1992; Accepted 25 April 1992

Copyright © 1992 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.


We present detailed experimental work involving a commercially available large scale shared memory multiple instruction stream-multiple data stream (MIMD) parallel computer having a software controlled cache coherence mechanism. To make effective use of such an architecture, the programmer is responsible for designing the program's structure to match the underlying multiprocessors capabilities. We describe the techniques used to exploit our multiprocessor (the BBN TC2000) on a network simulation program, showing the resulting performance gains and the associated programming costs. We show that an efficient implementation relies heavily on the user's ability to explicitly manage the memory system.