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Scientific Programming
Volume 3, Issue 2, Pages 157-168

Explaining the Gap between Theoretical Peak Performance and Real Performance for Supercomputer Architectures

W. Schönauer and H. Häfner

Rechenzentrum der Unirersität Karlsruhe, Postfach 6980, D-76128 Karlsruhe, Germany

Received 8 November 1993; Accepted 8 January 1994

Copyright © 1994 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.


The basic architectures of vector and parallel computers and their properties are presented followed by a discussion of memory size and arithmetic operations in the context of memory bandwidth. For a single operation micromeasurements of the vector triad for the IBM 3090 VF and the CRAY Y-MP/8 are presented, revealing in detail the losses for this operation. The global performance of a whole supercomputer is then considered by identifying reduction factors that reduce the theoretical peak performance to the poor real performance. The responsibilities of the manufacturer and of the user for these losses are discussed. The price-performance ratio for different architectures as of January 1991 is briefly mentioned. Finally a user-friendly architecture for a supercomputer is proposed.