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Scientific Programming
Volume 11, Issue 2, Pages 143-158

Scaling Non-Regular Shared-Memory Codes by Reusing Custom Loop Schedules

Dimitrios S. Nikolopoulos,1 Ernest Artiaga,2 Eduard Ayguadé,2 and Jesús Labarta2

1Coordinated Science Laboratory, University of Illinois at Urbana-Champaign, 1308 W. Main Street, Urbana, IL 61801, USA
2Department d'Arquitectura de Computadors, Universitat Politecnica de Catalunya, c/Jordi Girona 1-3, Modul D6, Barcelona 08034, Spain

Received 12 May 2003; Accepted 12 May 2003

Copyright © 2003 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.


In this paper we explore the idea of customizing and reusing loop schedules to improve the scalability of non-regular numerical codes in shared-memory architectures with non-uniform memory access latency. The main objective is to implicitly setup affinity links between threads and data, by devising loop schedules that achieve balanced work distribution within irregular data spaces and reusing them as much as possible along the execution of the program for better memory access locality. This transformation provides a great deal of flexibility in optimizing locality, without compromising the simplicity of the shared-memory programming paradigm. In particular, the programmer does not need to explicitly distribute data between processors. The paper presents practical examples from real applications and experiments showing the efficiency of the approach.