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Scientific Programming
Volume 18 (2010), Issue 1, Pages 1-33

State-of-the-art in Heterogeneous Computing

Andre R. Brodtkorb,1 Christopher Dyken,1 Trond R. Hagen,1 Jon M. Hjelmervik,1 and Olaf O. Storaasli2

1SINTEF ICT, Department of Applied Mathematics, Blindern, Oslo, Norway
2Oak Ridge National Laboratory, Future Technologies Group, Oak Ridge, TN, USA

Copyright © 2010 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.


Node level heterogeneous architectures have become attractive during the last decade for several reasons: compared to traditional symmetric CPUs, they offer high peak performance and are energy and/or cost efficient. With the increase of fine-grained parallelism in high-performance computing, as well as the introduction of parallelism in workstations, there is an acute need for a good overview and understanding of these architectures. We give an overview of the state-of-the-art in heterogeneous computing, focusing on three commonly found architectures: the Cell Broadband Engine Architecture, graphics processing units (GPUs), and field programmable gate arrays (FPGAs). We present a review of hardware, available software tools, and an overview of state-of-the-art techniques and algorithms. Furthermore, we present a qualitative and quantitative comparison of the architectures, and give our view on the future of heterogeneous computing.