Design of Efficient Full Adder in Quantum-Dot Cellular Automata

Table 1

Comparison of five-input majority gate.

Design	Layer	Clock no.	Cell no.	Area
In [22]	Undefined	0.50	18	7 × 6
In [17]	Coplanar	0.50	18	6 × 7
Proposed	Multilayer	0.25	13	5 × 5 × 5