Hardware Implementation of 32-Bit High-Speed Direct Digital Frequency Synthesizer

Table 1

Comparison between Rom size with previous DDFS works.

	Phase accumulator (bit)	Truncated phase (bit)	Amplitude phase (bit)	ROM size (bit)	Truncation ratio	SFDR (dB)
Sunderland et al., 1984 [11]	20	14	12	3328	59.1 : 1	72
Nicholas et al., 1988 [12]	31	15	14	3072	149.3 : 1	90
Curticǎpean and Niittylahti, 2001 [18]	28	14	12	832	236 : 1	84
De Caro and Strollo, 2005 [19]	24	14	12	480	409.6 : 1	83.6
Yang et al., 2004 [8]	32	14	12	2176	90.35 : 1	NA
Chimakurthy et al., 2006 [20]	15	15	15	1216	404 : 1	90.3
Babak and Keshavarzi, 2009 [21]	32	16	14	1664	551.3 : 1	85.3
De Caro et al., 2008 [22]	24	14	12	672	292.5 : 1	80
This work	32	14	12	368	534.2 : 1	68

Note: in this work the measured DDFS output waveform is in signal-to-noise ratio (SNR).