Research Article

Facilitating Preemptive Hardware System Design Using Partial Reconfiguration Techniques

Table 2

Time consumed in state transference ( ) measured in clock cycles per word.

32-bit word State size = FIFO depth
Store Load Init Store Load

Internal memory 7 7 16 2 3
External memory 10 42 16 33 40
External memory
(burst)
16 2 2