[Retracted] The Design and Implementation of Postprocessing for Depth Map on Real-Time Extraction System

Table 1

The occupancy of FPGA resource.

Item	Content		Remark
FPGA type	EP2AGX260EF29C4		Altera (Arria II GX260)
FPGA resource	Total pins	206/432	48%
	Total block memory bits	3004880/8755200	34%
	Total DSP block 18-bit elements	0/736	0%
	Total GXB receiver channel PCS	8/12	67%
	Total GXB receiver channel PMA	8/12	67%
	Total GXB transmitter channel PCS	8/12	67%
	Total GXB transmitter channel PMA	8/12	67%
	Total PLLs	2/6	33%
	Total DLLs	1/2	50%
	PCIE hard IP	1/1	100%
	Logic utilization	34%
	Combinational ALUTs	35717/205200	17%
	Memory ALUTs	24/102600	<1%
	Dedicated logic registers	60363/205200	29%
	Total registers	60799