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The Scientific World Journal
Volume 2015 (2015), Article ID 634846, 11 pages
Research Article

Enhanced High Performance Power Compensation Methodology by IPFC Using PIGBT-IDVR

1A.R. College of Engineering and Technology, Tirunelveli 627423, India
2Anna University, Chennai 600025, India

Received 24 June 2015; Revised 2 September 2015; Accepted 8 October 2015

Academic Editor: Wei Yu

Copyright © 2015 Subramanian Arumugom and Marimuthu Rajaram. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.


Currently, power systems are involuntarily controlled without high speed control and are frequently initiated, therefore resulting in a slow process when compared with static electronic devices. Among various power interruptions in power supply systems, voltage dips play a central role in causing disruption. The dynamic voltage restorer (DVR) is a process based on voltage control that compensates for line transients in the distributed system. To overcome these issues and to achieve a higher speed, a new methodology called the Parallel IGBT-Based Interline Dynamic Voltage Restorer (PIGBT-IDVR) method has been proposed, which mainly spotlights the dynamic processing of energy reloads in common dc-linked energy storage with less adaptive transition. The interline power flow controller (IPFC) scheme has been employed to manage the power transmission between the lines and the restorer method for controlling the reactive power in the individual lines. By employing the proposed methodology, the failure of a distributed system has been avoided and provides better performance than the existing methodologies.