A New Arbiter PUF for Enhancing Unpredictability on FPGA

Table 1

Placement of primitives on SLICEs for 3-1 Double Arbiter PUF. The value for the variable can range from 0 to 63.

Descriptions		Primitives	SLICEs
(MUX_1L_(), MUX_1R_())		F7BMUX	(SLICE_X14Y(76−), SLICE_X15Y(76−))
(MUX_2L_(), MUX_2R_())			(SLICE_X16Y(76−), SLICE_X17Y(76−))
(MUX_3L_(), MUX_3R_())			(SLICE_X18Y(76−), SLICE_X19Y(76−))
(MUX_4L_(), MUX_4R_())			(SLICE_X20Y(76−), SLICE_X21Y(76−))
Pair of NAND in	SR-Latch_1	C6LUT	(SLICE_X14Y12, SLICE_X16Y12)
	SR-Latch_2		(SLICE_X16Y11, SLICE_X18Y11)
	SR-Latch_3		(SLICE_X18Y10, SLICE_X14Y10)
	SR-Latch_4		(SLICE_X15Y12, SLICE_X17Y12)
	SR-Latch_5		(SLICE_X17Y11, SLICE_X19Y11)
	SR-Latch_6		(SLICE_X19Y10, SLICE_X15Y10)