Table of Contents
VLSI Design
Volume 3, Issue 3-4, Pages 333-345

PARTIF: Interactive System-level Partitioning

System-level Synthesis Group, TIMA/INPG, 46 Av. Félix Viallet, Grenoble Cédex 38031, France

Copyright © 1995 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Citations to this Article [2 citations]

The following is the list of published articles that have cited the current article.

  • Marchioro, Daveau, and Jerraya, “Transformational partitioning for co-design of multiprocessor systems,” Proceedings of IEEE International Conference on Computer Aided Design (ICCAD) ICCAD-97, pp. 508–515, . View at Publisher · View at Google Scholar
  • Ns Voros, L Sanchez, A Alonso, M Birbas, A Jerraya, and An Birbas, “Hardware/software co-design of complex embedded systems - An approach using efficient process models, multiple formalism specification and validation via co-simulation,” Design Automation For Embedded Systems, vol. 8, no. 1, pp. 5–49, 2003. View at Publisher · View at Google Scholar