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VLSI Design
Volume 4 (1996), Issue 1, Pages 83-90
http://dx.doi.org/10.1155/1996/51972

Design of an ASIC Chip for Skeletonization of Graylevel Digital Images

1Department of Electronics and Electrical Communication Engineering, Indian Institute of Technology, Kharagpur 721 302, India
2Department of Computer Science and Engineering, Indian Institute of Technology, Kharagpur 721 302, India

Received 1 December 1992; Revised 5 April 1993

Copyright © 1996 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

How to Cite this Article

B. Majumdar, V. V. Ramakrishna, P. S. Dey, and A. K. Majumdar, “Design of an ASIC Chip for Skeletonization of Graylevel Digital Images,” VLSI Design, vol. 4, no. 1, pp. 83-90, 1996. doi:10.1155/1996/51972