Dinesh Bhatia, V. Shankar, "Greedy Segmented Channel Router", VLSI Design, vol. 5, Article ID 053512, 11 pages, 1996. https://doi.org/10.1155/1996/53512
Greedy Segmented Channel Router
An efficient solution to the generalized detailed routing problem in segmented channels for row-based FPGAs is presented. A generalized detailed routing allows routing of each connection using an arbitrary number of tracks, i.e., doglegs are allowed. This approach is different from the normally followed method where each connection is routed on a single straight track. We present a router that performs generalized segmented channel routing using a greedy approach to route channels. The router also renders itself to limited tolerance against faults in the routing architecture.
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