Table of Contents
VLSI Design
Volume 8, Issue 1-4, Pages 533-537
http://dx.doi.org/10.1155/1998/54802

Modeling of Poly-Silicon Carrier Transport with Explicit Treatment of Grains and Grain Boundaries

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Copyright © 1998 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

How to Cite this Article

Edwin C. Kan and Robert W. Dutton, “Modeling of Poly-Silicon Carrier Transport with Explicit Treatment of Grains and Grain Boundaries,” VLSI Design, vol. 8, no. 1-4, pp. 533-537, 1998. https://doi.org/10.1155/1998/54802.