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VLSI Design
Volume 8, Issue 1-4, Pages 429-435
http://dx.doi.org/10.1155/1998/65364

Study of Electron Velocity Overshoot in NMOS Inversion Layers

Microelectronics Research Center, The University of Texas at Austin, Austin, TX 78712, USA

Copyright © 1998 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

How to Cite this Article

Wei-Kai Shih, Srinivas Jallepalli, Mahbub Rashed, Christine M. Maziar, and Al. F. Tasch Jr., “Study of Electron Velocity Overshoot in NMOS Inversion Layers,” VLSI Design, vol. 8, no. 1-4, pp. 429-435, 1998. https://doi.org/10.1155/1998/65364.