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VLSI Design
Volume 11, Issue 4, Pages 321-329
http://dx.doi.org/10.1155/2000/21852

Design of MOS-translinear Multiplier/Dividers in Analog VLSI

Department of Electrical and Electronic Engineering, Public University of Navarra, Arrosadía s/n., Pamplona E-31006, Spain

Received 5 June 1999; Accepted 10 November 1999

Copyright © 2000 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Citations to this Article [7 citations]

The following is the list of published articles that have cited the current article.

  • C.A. De La Cruz Blas, A.J.L. Martin, and A. Carlosena, “Synthesis of companding systems by component to component substitution: an alternative method,” ICECS 2001. 8th IEEE International Conference on Electronics, Circuits and Systems (Cat. No.01EX483), vol. 2, pp. 811–814, . View at Publisher · View at Google Scholar
  • Aram Baharmast, Seyed Javad Azhari, and Siavash Mowlavi, “A new current mode high speed four quadrant CMOS analog multiplier,” 2016 24th Iranian Conference on Electrical Engineering (ICEE), pp. 1371–1376, . View at Publisher · View at Google Scholar
  • Jaime Ramirez-Angulo, Raghavender Chintham, Antonio J. Lopez-Martin, and Ramon G. Carvajal, “Class AB Pseudo-Differential CMOS Squarer Circuit,” 2007 IEEE International Symposium on Circuits and Systems, pp. 689–692, . View at Publisher · View at Google Scholar
  • Serdar Menekay, Riza Can Tarcan, and Hakan Kuntman, “Novel high-precision current-mode multiplier/divider,” Analog Integrated Circuits and Signal Processing, vol. 60, no. 3, pp. 237–248, 2009. View at Publisher · View at Google Scholar
  • S. Menekay, Riza Can Tarcan, and Hakan Kuntman, “Novel high-precision current-mode circuits based on the MOS-translinear principle,” AEU - International Journal of Electronics and Communications, vol. 63, no. 11, pp. 992–997, 2009. View at Publisher · View at Google Scholar
  • Usa Torteanchai, Montree Kumngern, and Kobchai Dejhan, “A CMOS log-antilog current multiplier/divider circuit using DDCC,” IEEE Region 10 Annual International Conference, Proceedings/TENCON, pp. 634–637, 2011. View at Publisher · View at Google Scholar
  • Mostafa Shaterian, and Christopher M. Twigg, “Synthesis of a reconfigurable analog vector-sum circuit into the MTL-Based configurable blocks,” Microelectronics Journal, vol. 75, pp. 97–104, 2018. View at Publisher · View at Google Scholar