Table of Contents
VLSI Design
Volume 11, Issue 2, Pages 129-136
http://dx.doi.org/10.1155/2000/57240

νMOS-based Sorter for Arithmetic Applications

1Instituto de Microelectrónica de Sevilla, Centro Nacional de Microelectrónica, Edif. CICA, Avda. Reina Mercedes s/n, Sevilla 41012, Spain
2Instituto de Microelectrónica de Sevilla, IMSE-CNM, Universidad de Sevilla. Edif. CICA, Avda. Reina Mercedes s/n, Sevilla 41012, Spain

Received 1 June 1999; Accepted 22 November 1999

Copyright © 2000 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

How to Cite this Article

E. Rodríguez-Villegas, M. J. Avedillo, J. M. Quintana, G. Huertas, and A. Rueda, “νMOS-based Sorter for Arithmetic Applications,” VLSI Design, vol. 11, no. 2, pp. 129-136, 2000. https://doi.org/10.1155/2000/57240.