Table of Contents
VLSI Design
Volume 11, Issue 4, Pages 381-396
http://dx.doi.org/10.1155/2000/76384

An Integrated Approach to Data Path Synthesis for Behavioral-level Power Optimization

1Synopsys Inc., 700 E. Middlefield Rd., Mountain View, CA 94043, USA
2Department of Electrical Engineering & Computer Science, and Advanced Information Technology Research Center (AITrc), KAIST, Korea
3Department of Computer Science, National Tsing Hua University, 101, Sec. 2, Kuang Fu Road, Taiwan, Hsinchu, China

Received 5 June 1999; Accepted 21 December 1999

Copyright © 2000 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

How to Cite this Article

Chaeryung Park, Taewhan Kim, and C. L. Liu, “An Integrated Approach to Data Path Synthesis for Behavioral-level Power Optimization,” VLSI Design, vol. 11, no. 4, pp. 381-396, 2000. https://doi.org/10.1155/2000/76384.