Table of Contents Author Guidelines Submit a Manuscript
VLSI Design
Volume 12, Issue 2, Pages 167-186
http://dx.doi.org/10.1155/2001/27496

Automatic FSM Synthesis for Low-power Mixed Synchronous/Asynchronous Implementation

1Mid-Sweden University, Department of Information Technology, Sundsvall, Sweden
2Tallinn Technical University, Department of Computer Engineering, Tallinn, Estonia

Received 20 June 2000; Revised 3 August 2000

Copyright © 2001 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Citations to this Article [9 citations]

The following is the list of published articles that have cited the current article.

  • C. Cao, and B. Oelmann, “Mixed synchronous/asynchronous state memory for low power FSM design,” pp. 363–370, . View at Publisher · View at Google Scholar
  • A. Sudnitson, “An approach to synthesis of mixed synchronous/asynchronous digital devices,” 2002 23rd International Conference on Microelectronics. Proceedings (Cat. No.02TH8595), vol. 2, pp. 695–698, . View at Publisher · View at Google Scholar
  • César Elizondo-González, “A Solution for Combinational and Asynchronous Sequential Logic Problems by Means of Logic Variable,” Proceedings of the IEEE Conference on Decision and Control, vol. 4, pp. 3227–3232, 2003. View at Publisher · View at Google Scholar
  • M. O'Nils, C. Cao, and B. Oelmann, “Synthesis tool for low-power finite-state machines with mixed synchronous/asynchronous state memory,” IEE Proceedings: Computers and Digital Techniques, vol. 153, no. 4, pp. 243–248, 2006. View at Publisher · View at Google Scholar
  • Cao Cao, and Bengt Oelmann, “Low-power state encoding for partitioned FSMs with mixed synchronous/asynchronous state memory,” Integration, the VLSI Journal, vol. 41, no. 1, pp. 123–134, 2008. View at Publisher · View at Google Scholar
  • Cao Cao, and Bengt Oelmann, “Low-power state encoding for partitioned FSMs with mixed synchronous/asynchronous state memory,” Integration-The Vlsi Journal, vol. 41, no. 1, pp. 123–134, 2008. View at Publisher · View at Google Scholar
  • Jie Jin, Dun Shan Yu, and Xiao Xin Cui, “A method to lower power in speed negotiation algorithm of fiber channel,” International Conference on Solid-State and Integrated Circuits Technology Proceedings, ICSICT, pp. 2132–2135, 2008. View at Publisher · View at Google Scholar
  • Duarte L. Oliveira, and Luiz S. Ferreira, “Asynchronous burst-mode control for low-power gated-clock finite state machines,” 2011 IEEE 2nd Latin American Symposium on Circuits and Systems, LASCAS 2011 - Conference Proceedings, 2011. View at Publisher · View at Google Scholar
  • Y. Lee, and T. Kim, “State encoding algorithm for peak current minimisation,” IET Computers & Digital Techniques, vol. 5, no. 2, pp. 113, 2011. View at Publisher · View at Google Scholar