Table of Contents
VLSI Design
Volume 12, Issue 1, Pages 81-99
http://dx.doi.org/10.1155/2001/58303

Distributed Fault Simulation Algorithms on Parallel Virtual Machine

Department of Electrical Engineering, Indian Institute of Technology, New Delhi 110016, India

Received 1 August 1995; Revised 6 February 1997

Copyright © 2001 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Abstract

In this paper, we describe distributed algorithms for combinational fault simulation assuming the classical stuck-at fault model. Our algorithms have been implemented on a network of Sun workstations under the Parallel Virtual Machine (PVM) environment. Two techniques are used for subdividing work among processors – test set partition and fault set partition. The sequential algorithm for fault simulation, used on individual nodes of the network, is based on a novel path compression technique proposed in this paper. We describe experimental results on a number of ISCAS′85 benchmark circuits.